1. Field of the Invention
The present invention pertains to a multiprocessor computer system, and more particularly, to an apparatus within said multiprocessor computer system for disabling one processor of the multiprocessor computer system when the one processor fails and for informing the remaining processors of the multiprocessor system of the failure within the one processor.
2. Description of the Prior Art
In a multiprocessor computer system, such as that which is disclosed in British Patent Specification No. 1,163,859 published Sept. 10, 1969, two or more processors are utilized for the execution of instructions stored in a main memory. In some multiprocessor computer systems, during normal machine operation, if one processor requires certain data during the execution of an instruction, it may search its cache for the data necessary to execute the instruction. If it fails to find the data, it may search the cache of the other processors for the data. If the data is not found in the cache of the other processors, the one processor may search the main memory for the data. However, if a failure occurs within the one processor, the entire computer system may be non-functional, even though the other processors are functional and available for use. Furthermore, even though the one processor is non-functional, the other processors may continue to search the cache of said one processor for data thereby consuming time during the execution of an instruction.